1. Technical Field
The disclosure relates to a semiconductor memory apparatus, and in particular, to a reference voltage generating circuit that generates a reference voltage for discriminating data values of received external data.
2. Related Art
When discriminating a logic value of data based on the voltage level of a data signal, a semiconductor memory apparatus recognizes data as being at a logic high level, when the data signal has a voltage that exceeds a certain reference voltage. Similarly, if the data signal voltage level does not exceed the reference voltage, then the data will be recognized as a logic low level data signal.
As shown in FIG. 1, a general voltage generating circuit 101 for a semiconductor memory apparatus includes a voltage generating unit 10 and a data driver 20. The voltage generating unit 10 includes two resistors R1 and R2 that divide an external voltage (VDD) to generate a reference voltage (Vref). The reference voltage (Vref) is at a voltage level corresponding to 0.7 times as much as the external voltage (VDD).
The data driver 20 is supplied with the reference voltage (Vref), and compares the signal levels of input data (IN<0:1>).
An ideal reference voltage should be at an intermediate voltage level of a maximum potential input voltage level (VIH) and a minimum potential input voltage level (VIL), that is, (VIH+VIL)/2. In the example of FIG. 1, the maximum potential input voltage level (VIH) is (VDD). Therefore the reference voltage should ideally be (VDD+VIL)/2.
However, a conventional voltage generating unit 10 unconditionally generates the reference voltage (Vref) at 0.7 times the external voltage (VDD). Therefore, the actual reference voltage (Vref=0.7 VDD) differs from the ideal reference voltage (Vref=(VDD+VIL)/2), and as the difference becomes large, the data driver 20 cannot operate normally. For this reason, it is difficult for the semiconductor memory apparatus to accurately discriminate the logic level of received data.